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  motorola.com/semiconductors 56f8346 hybrid controller 56f8346 digital power factor correction using processor expert tm targeting document 8346DPFCTD/d rev 0, 12/2003 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
specifications 2 digital power factor correction using 56f8346 digital power factor correction this application exercises simple control of the power factor correction (pfc) without motor control on the56f8346evm board and the evm motor kit. 1. specifications the digital pfc application performs power factor correction for 3-phase ac/bldc high-voltage power stage hardware without motor drive. this demonstration evaluates the basic algorithm of power factor correction for the current hardware implementation. pfc software was designed for use with motor control applications; the digital pfc application allows target memory configuration of ram and flash. the input power line must meet the following requirements: ? input voltage value 115v and 60hz  input voltage value 230v and 50hz the applications run at 230v, 50hz by default. to switch to 115v, 60hz comment this line in digital_pfc.c : #define milestone_offset mks_to_tick(570l) //for 50 hz, 230 v and uncomment this line: //#define milestone_offset mks_to_tick(1498l) //for 60 hz, 115 v the digital pfc application may be used in the manual operating mode. the remote control functionality of the pc master software application is not implemented. the application can run on:  external ram flash f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
specifications digital power factor correction using 56f8346 3 1.1 manual operating mode the pfc conversion is controlled by the run/stop switch (s3); see figure 1-1 . the green user led (led2; see figure 1-2 ) indicates the application states. when the application is ready, the user led blinks at a 2hz frequency. figure 1-1. run/stop switch on the daughter card figure 1-2. user led on the daughter card the pfc conversion can be enabled after the run/stop switch is moved to the run position. the normal pfc conversion process is indicated by the green user led, which will light continuously. to disable pfc conversion, the run/stop switch must be moved to the stop position. run/stop switch user green led f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
specifications 4 digital power factor correction using 56f8346 1.2 pc master software (remote) operating mode the drive is monitored remotely from a pc through the sci communication channel of the device via an rs-232 physical interface. pc master software displays the following information:  application mode  application status  dcbus voltage application mode project files for the pc master software are located in: ..\pcmaster\sdm_external_memory.pmp , uses map file to run in the small memory model of the external memory ..\pcmaster\ldm_external_memory.pmp , uses map file to run in the large memory model of the external memory ..\pcmaster\sdm_prom-xram.pmp , uses map file to run in the small memory model of the internal memory ..\pcmaster\ldm_prom-xram.pmp , uses map file to run in the large memory model of the internal memory ..\pcmaster\sdm_xrom-xram.pmp , uses map file to run in the small memory model of the internal memory ..\pcmaster\ldm_xrom-xram.pmp , uses map file to run in the large memory model of the internal memory start the pc master software window ? s application, sdm_external_memory.pmp . figure 1-3 illustrates the pc master software control window after this project has been launched. table 1-1. motor application states application state digital pfc state led state stopped stopped green led blinking red led off running spinning green led on red led off fault stopped green led off, red led on f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
specifications digital power factor correction using 56f8346 5 figure 1-3. pc master software control window f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
hardware set-up 6 digital power factor correction using 56f8346 2. hardware set-up figure 2-1 illustrates the hardware set-up for the digital pfc application, which requires a motor drive. the 3-phase ac/bldc high-voltage power stage board contains the jp201 jumper that selects the power supply device. pins 2 and 3 of the jp201 connection correspond to a simple rectifier-capacitor power stage. the pfc hardware set-up requires closing pins 1 and 2 of the jp201 connection; see figure 2-2 . figure 2-1. digital pfc application set-up the system is comprised of the following components:  controller board for 56f8346 ? supplied as 56f8346evm ? described in 56f8346 evaluation module hardware user?s manual  3-phase ac bldc high-voltage power stage, 180w ? supplied in a kit with optoisolation board as ecopthivacbldc ? described in 3-phase brushless dc high-voltage power stage  optoisolation board ? supplied with 3-phase ac/bldc high-voltage power stage as ecopthivacbldc or ? supplied alone as ecopt - optoisolation board ? described in o ptoisolation board user ? s manual warning: it is strongly recommended that optoisolation (optocouplers and optoisolation amplifiers) be used during development to avoid damage to the development equipment. note: documentation for all components can be found at: http://motorola.com/semiconductors power supply motor power connector ac power line connector 3-ph ac bldc hv power stage optoisolation board controller board serial cable parallel cable daughter card f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
hardware set-up digital power factor correction using 56f8346 7 figure 2-2. jumper jp201 on the 3-phase ac bldc power stage for detailed information, see the 56f8346 evaluation module hardware user ? s manual . the serial cable is needed for the pc master software debugging tool only. 2.1 evm jumper settings to execute the digital pfc application, the 56f8346evm board requires the strap settings shown in figure 2-3 and table 2-1 ; the daughter card requires the strap settings shown in figure 2-4 and table 2-2 . figure 2-3. 56f8346evm jumper reference pfc jumper jp201 1 2 3 1 1 1 1 1 1 1 jg15 jg16 jg12 jg7 jg2 jg13 jg1 jg14 jg3 jg4 jg10 jg9 j3 j12 j13 p2 p1 j1 j2 j10 j11 j9 j14 j15 j16 j17 j18 j21 j19 j20 jg11 j5 j6 j8 j7 jg6 jg5 1 1 1 1 1 1 1 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
hardware set-up 8 digital power factor correction using 56f8346 table 2-1. dsp56f8346evm jumper settings jumper group comment connections jg1 uses on-board extal crystal input for oscillator 1-2 jg2 uses on-board xtal crystal input for oscillator 1-2 jg3 enables internal boot mode 1-2 jg4 enables a0 - a19 for external memory accesses nc jg5 enables sram memory bank 0 (use cs0) 1-2 jg6 enables sram memory bank 1 (use cs1 & cs2) 1-2, 3-4 jg7 enables rs-232 disable nc jg8 spi #0 daisy chain (optional--not populated on board by default) nc jg9 enables on-board parallel jtag host/target interface 1-2 jg10 connects analog ground to digital ground 1-2 jg11 selects can termination 1-2 jg12 passes rxd0 & txd0 to rs-232 level converter 1-2, 3-4 jg13 enables crystal mode 1-2 jg14 passes temperature diode to ana7 1-2 jg15 user jumper #0 1-2 jg16 user jumper #1 1-2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
hardware set-up digital power factor correction using 56f8346 9 figure 2-4. 56f8346evm - daughter card jumper reference note: when running the evm target system in a stand-alone mode from flash, the jg9 jumper must be set in the 1-2 configuration to disable the command converter parallel port interface. table 2-2. 56f8346evm daughter card jumper settings jumper group comment connections jg1 primary pfc 1-2, 3-4, 5-6, 7-8, 9-10 jg2 secondary pfc nc jg3 phase_is / over_i 1-2 jg4 primary zero-crossing / encoder 2-3, 5-6, 8-9 jg5 secondary zero-crossing / encoder nc jg6 primary back-emf / phase-is 1-2, 4-5, 7-8 jg7 secondary back-emf / phase-is nc jg8 fault a monitor 1-2, 3-4, 5-6 jg9 fault b monitor 1-2, 3-4, 5-6 jg10 switch 1 1-2 jg11 switch 2 1-2 jg12 switch 3 (run / stop) 1-2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
build 10 digital power factor correction using 56f8346 3. build when building the digital pfc application, the user can create an application that runs from internal flash or external ram. to select the type of application to build, open the digital_pfc.mcp project and choose the target build type; see figure 3-1 . a definition of the projects associated with these target build types may be viewed under the targets tab of the project window. figure 3-1. target build selection the project may now be built by executing the make command, as shown in figure 3-2 . this will build and link the digital pfc application and all needed metrowerks and processor expert libraries. figure 3-2. execute make command f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
projects files digital power factor correction using 56f8346 11 for more information about these commands, see: <...>\codewarrior manuals\pdf\targeting_56800e.pdf 4. projects files the digital pfc application is composed of the following files:  ...\project directory \ ? project file name ? .mcp , application project file  ...\project directory\ ? project file name ? .pe , processor expert software file  ...\project directory\ ? project file name ? .g_c , processor expert software file  ...\project directory\ ? project file name ? .dsk , processor expert software file  ...\project directory\bin\*.xmap , map file  ...\project directory\bin\*.elf , standard binary file  ...\project directory\startup\*.c, *.h, *.asm , initialization files  ...\project directory\code\adcprimary.* files generated by the pe for adcprimary bean  ...\project directory\code\pc_m1.* , files generated by the pe for pc_m1 bean  ...\project directory\code\tiaux.* , files generated by the pe for tiaux bean  ...\project directory\code\tmrd1.* , files generated by the pe for tmrd2 bean  ...\project directory\code\cpu.* , files generated by the pe for the cpu used  ...\project directory\code\events.* , files generated by the pe for events  ...\project directory\code\pe_const.* , pe internal definitions of the constants  ...\project directory\code\pe_error.* , pe internal definitions of the error constants  ...\project directory\code\pe_types.* , pe internal definitions of the types  ...\project directory\code\pesl.* , configuration file for pesl library  ...\project directory\code\vectors.* , definitions of the interrupt vectors 5. execute to execute the digital pfc application, select the project/debug command in the codewarrior ide, followed by the run command. for more help with these commands, refer to the codewarrior tutorial documentation in the following file, located in the codewarrior installation directory: <...>\codewarrior manuals\pdf\targeting_56800e.pdf if the flash target is selected, codewarrior will automatically program the device ? s internal flash with the executable generated during build . if the external ram target is selected, the executable will be loaded to off-chip ram. once flash has been programmed with the executable, the evm target system may be run in a stand-alone mode from flash. to do this, set the jg9 jumper in the 1-2 configuration to disable the parallel port, and press the reset button. to enable the pfc conversion, set the run/stop switch to the run position. if this switch was in the run position before the application started, move it to the stop position first, then back to the run position. the user led should light continuously when the pfc conversion is enabled. to disable the pfc conversion, move the run/stop switch to the stop position, causing the user led to blink again. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217 1-303-675-2140 or 1-800-441-2447 japan: motorola japan ltd.; sps, technical information center, 3-20-1, minami-azabu minato-ku, tokyo 106-8573 japan 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kong 852-26668334 technical information center: 1-800-521-6274 home page: http://motorola.com/semiconductors information in this document is provided solely to enable system and software implementers to use motorola products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the u.s. patent and trademark office. digital dna is a trademark of motorola, inc. this product incorporates superflash? technology licensed from sst. all other product or service names are the property of their respective owners. motorola, inc. is an equal opportunity/affirmative action employer. ? motorola, inc. 2003 8346DPFCTD/d f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .


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